Identification of Defective CMOS Devices Using Correlation and Regression Analysis of Frequency Domain Transient Signal Data

Transient Signal Analysis is a digital device testing method that is based on the analysis of voltage transients at multiple test points and on I DD switching transients on the supply rails. We show that it is possible to identify defective devices by analyzing the transient signals produced at test points on paths not sensitized from the defect site. The small signal variations produced at these test points are analyzed in the frequency domain. Correlation analysis shows a high degree of correlation in these signals across the outputs of defect-free devices. We use regression analysis to show the absence of correlation across the outputs of bridging and open drain defective devices. Transient Signal Analysis (TSA) is a parametric approach to testing digital integrated circuits. TSA is based on a measurement of the contribution to the transient response of a device by physical characteristics such as substrate, power supply or parasitic coupling which are present in any circuit. Defect detection is accomplished in TSA by analyzing the variations produced by defects in the voltage and current transients of defective devices. The voltage transients are measured on test points near the primary outputs of the device. The current transients can be measured at the power supply I/O pins of a device without significant high frequency attenuation because of the absence of driver circuitry in the pads. However, these signals alone cannot be used to differentiate between the variations produced by defects and those produced by variability in device characteristics due to process variations. TSA is able to distinguish between these two types of variations by additionally measuring voltage transients at a set of test points. The variations in multiple test point signals are cross-correlated to determine if the variation is regional or global. The absence of correlation in one or more of the test point signals indicates the presence of a catastrophic defect. On the other hand, the variations produced by fluctuations in process parameters tend to be global and correlated in all test point measurements. In previous papers [1][2], we have demonstrated through simulations that global variations of major device performance parameters, i.e. threshold voltage and gate oxide thickness, result in measurable changes of the cir-cuit's transient response at all test points. In contrast, the presence of a device defect will change both the value and topology of the parasitic components in the region of the defect. We have shown through …